1. Field of the Invention
The present invention relates to a display device, and more particularly, to a thin film transistor applied to a display device.
2. Discussion of the Related Art
A thin film transistor (TFT) is used as a switching element for controlling an operation of each pixel or a driving element for driving each pixel in a display device such as a liquid crystal display (LCD) or an organic light emitting device (OLED).
The thin film transistor includes a gate electrode, an active layer, and source/drain electrodes. Based on an arrangement of the electrodes, the thin film transistor may be classified into a staggered structure and a coplanar structure.
In case of the staggered structure, the gate electrode and the source/drain electrodes are vertically arranged with the active layer interposed therebetween. Meanwhile, in case of the coplanar structure, the gate electrode and the source/drain electrodes are arranged on the same plane.
According to a channel formation method, the thin film transistor of the staggered structure may be classified into a back channel etched (BCE) type and an etch stopper layer (ESL) type. In case of the ESL type, an etch stopper layer is formed on the active layer so that it is possible to prevent the active layer from being over-etched. Owing to this advantage, there is the increasing use of ESL type thin film transistor.
FIGS. 1A to 1E are cross sectional views illustrating a method for manufacturing an ESL type thin film transistor substrate.
First, as shown in FIG. 1A, a gate electrode 20 is formed on a substrate 10, and then a gate insulating layer 25 is formed on an entire surface of the substrate 10 including the gate electrode 20.
As shown in FIG. 1B, an active layer 30a and an etch stopper layer 40a are sequentially formed on the gate insulating layer 25. After that, as shown in FIG. 1C, the etch stopper layer 40a is patterned to thereby form a predetermined etch stopper 40. The etch stopper 40 functions as a stopper for an etching process to be described later.
Then, as shown in FIG. 1D, an ohmic contact layer 50a and a source/drain electrode layer 60a are sequentially formed on the entire surface of the substrate 10 including the etch stopper 40.
As shown in FIG. 1E, the source/drain electrode layer 60a is patterned to form a source electrode 62 and a drain electrode 64. Under the condition that the source/drain electrodes 62/64 are used as a mask, the ohmic contact layer 50a and active layer 30a positioned underneath the source/drain electrodes 62/64 are etched to thereby form an ohmic contact layer 50 and active layer 30 with a predetermined pattern.
The etch stopper 40 is not formed at left and right sides of the source/drain electrodes 62/64, whereby both the ohmic contact layer 50a and active layer 30a are etched together. However, since the etch stopper 40 is formed in a region between the source electrode 62 and the drain electrode 64, only the ohmic contact layer 50a is etched therein.
However, because the related art thin film transistor is formed in a single gate electrode structure with one gate electrode 20, as shown in FIGS. 1A to 1E, it is difficult to achieve output saturation characteristics. In addition, there is a non-negligible gap between transfer curves according to voltages between source and drain of a thin film transistor within a subthreshold region, whereby problems of crosstalk or non-uniform luminance such as spots may occur on a screen. Especially, if the thin film transistor with the single gate electrode structure is applied to the organic light emitting device, a compensation capacity may be deteriorated.
Also, in case of the related art thin film transistor with the etch stopper 40, the thin film transistor is inevitably increased in size due to an overlay rule in between each layer. Due to the increased size of thin film transistor, an overlap area between the gate electrode 20 and the source/drain electrodes 62/64 is increased in size, to thereby increase a capacitance of the thin film transistor.